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docs: scrub private repo name, self-contain design references, document F12 coverage bias

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dtzp555-max
2026-07-10 19:55:16 +10:00
parent c5f8d0f940
commit 694454d9fc
7 changed files with 47 additions and 32 deletions
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tests/test_f10_validators.py
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@@ -1,7 +1,7 @@
"""F10 — server-side value validation, unit level (aci_sim/rest_aci/validators.py).
Table-driven per the design doc's own zero-false-reject proof methodology
(``_F10_VALIDATION_DESIGN.md`` §6): every canonical value that appears in the
Table-driven per this suite's own zero-false-reject proof methodology: every
canonical value that appears in the
real-hardware-passing corpus (``~/e2e-20260708/vars/{ms,sf,common}/`` +
``logs/ansible/*create_tenant*.yml``) MUST pass; every F10-probe bad value
(``logs/probe/*probe_L2b.yml``) and one or two hand-built out-of-range/format
@@ -322,11 +322,10 @@ def test_unregistered_class_prop_pair_has_no_validator():
def test_rules_table_size_matches_design_scope():
"""Sanity lock on the registry shape: P1+P2 (+3 migrated ip rules) should
land in the low-to-mid 40s of (class, prop) entries — see
_F10_VALIDATION_DESIGN.md §2A/§2B row counts (16+17 table ROWS; several
rows cover 2+ props, e.g. infraPortBlk's 4 port/card fields, so the
(class, prop) key count is naturally higher than the 31 "core rules"
row-count figure quoted in the design doc's summary)."""
land in the low-to-mid 40s of (class, prop) entries (16+17 source-table
rows; several rows cover 2+ props, e.g. infraPortBlk's 4 port/card
fields, so the (class, prop) key count is naturally higher than the 31
"core rules" row-count figure)."""
assert 35 <= len(RULES) <= 55
tests/test_f12_uniform_redirect.py
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@@ -1,11 +1,11 @@
"""F12 — NDO uniform per-fabric service-graph redirect gate.
Design: `_F4_F12_VALIDATION_DESIGN.md` §3 (repo root). Confirmed sim gap: a
single-fabric (partial) `serviceGraphRelationship` redirect write used to
succeed in the sim while real NDO 400s with `must have uniform redirect
policy configured on all fabrics` — NDO validates the FINAL POST-REQUEST
state, so a legal atomic multi-op PATCH covering every fabric of a
template in ONE request must still pass.
See aci_sim/ndo/service_graph_validation.py's docstring for the full F12
rule. Confirmed sim gap: a single-fabric (partial) `serviceGraphRelationship`
redirect write used to succeed in the sim while real NDO 400s with `must
have uniform redirect policy configured on all fabrics` — NDO validates the
FINAL POST-REQUEST state, so a legal atomic multi-op PATCH covering every
fabric of a template in ONE request must still pass.
Replicates the mso-model role's "Atomic PATCH — bind service-graph redirect
on ALL fabrics in one request" task (design §1.4) — the exact shape
tests/test_f4_service_graph_device.py
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@@ -1,8 +1,9 @@
"""F4 — NDO service-graph device-existence gate.
Design: `_F4_F12_VALIDATION_DESIGN.md` §2 (repo root). Confirmed sim gap: a
phase2-only service-graph bind (skip phase1's APIC-side `vnsLDevVip`
create) used to succeed in the sim while real NDO 400s with
See aci_sim/ndo/service_graph_validation.py's docstring for the full F4
rule. Confirmed sim gap: a phase2-only service-graph bind (skip phase1's
APIC-side `vnsLDevVip` create) used to succeed in the sim while real NDO
400s with
`Service graph device <dev> does not exist in tenant <tenant> in Fabric
<site>`.